To identify a signal stream being transmitted to a receiver, many digital communication systems use matched filters to detect a section of the bit stream having a unique bit pattern, so that the receiver can selectively receive and process the signal streams associated with the unique pattern.
As one example, in a Code Division Multiple Access (CDMA) communication system, the signal streams from each cellular telephone are coded and transmitted together with the signal streams from other cellular telephones over a very wide bandwidth. All cellular telephones in a CDMA communication system differentiate themselves from one another using a pseudo-random code. A particular pseudo-random code allows a receiver to access the signal streams that are sent to it. A matched filter can be used to detect a particular pseudo-random code for a respective cellular telephone receiver.
As another example, in many communication systems, each message is divided into frames before transmission to a receiver. For synchronization, each frame contains a preamble having a unique bit pattern. A matched filter detects the unique bit pattern, and the receiver can start to receive and process the frame once the preamble is detected.
FIG. 1 shows a conventional match filter including a sample register 102 for storing a sample stream of 358 bits, a signal register 104 for storing a signal stream of 358 bits, an array 106 consisting of 358 XNOR gates, and an adder tree 108. Each of the XNOR gates receives a respective sample bit from the sample pattern register 102 and a respective signal bit from the signal register 104. The array 106 compares the 358 signal bits from the signal register 102 with the respective sample bits from the sample register 104, to determine how many signal bits in the signal register 104 are identical to the sample bits in sample register 102. Specifically, an XNOR gate generates a value 1, if the received signal bit is the same as the received sample bit, and generates a value 0, if the received signal bit is different from the received sample bit. The array 106 feeds the 358 comparison result bits to the adder tree 108. By adding the 358 comparison result bits together, the adder tree 108 generates a correlation. The signal bits in the signal register 104 match the sample bits in the sample register 102 if the correlation is greater than or equal to a threshold value. The signal bits in the signal register 104 do not match the sample bits in the sample register 102 if the correlation is less than the threshold value.
Unfortunately, the conventional matched filter has some shortcomings. To generate a correlation between a signal stream section and a sample stream of n bits, the conventional matched filter requires n XNOR gates. If n is a large number, the adder tree must be divided into many layers. For example, the matched filter shown in FIG. 1 requires 358 XNOR gates. If the adder tree 108 uses a 3-bit-input full adder as basic building blocks, it comprises 8 layers with each layer having 178, 89, 44, 22, 11, 5, 2, and 1 full adders, respectively. Also disadvantageous is that the conventional matched filter has a complex hardware structure, entailing high cost but providing low speed.
There is, therefore, a need for an improved apparatus and method for generating a sequence of correlations for each of the signal bits in a signal bit stream in comparison to a sample bit stream, the apparatus and method being characterized by low complexity and high speed.
There is also a need for low cost apparatus and method to generate a sequence of correlations for each of the signal bits in a signal bit stream in comparison to a sample bit stream.
The present invention provides the methods and apparatus to meet these needs.